So the value actually used for the memory clock might be significantly less than this maximum value. The lower half of the screen is not accessible. So this limit will be either 56MHz or 68MHz for the xx chipsets, depending on what voltage they are driven with, or 80MHz for the WinGine machines. Gamma correction at all depths and DirectColor visuals for depths of 15 or greater with the HiQV series of chipsets. Additionally, the ” Screen ” option must appear in the device section. This document attempts to discuss the features of this driver, the options useful in configuring it and the known problems.
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When the size of the mode used is less than the panel size, the default behaviour of the server is to stretch the mode in an attempt to fill the screen. At this point no testing has been done and it is entirely possible that technoologies ” MMIO option will lockup your machine.
For other depths this option has no effect. Similar to the but also incorporates “PanelLink” drivers. However these numbers take no account of the extra bandwidth needed for DSTN screens.
The XVideo extension has only recently been added to the chips driver. Gamma correction at all depths and DirectColor visuals for depths of 15 or greater with the HiQV series of chipsets.
The HiQV series of chips have three programmable clocks. Composite sync on green.
This is a driver limitation that might be relaxed in the future. Using an 8bpp, the colour will then be displayed incorrectly. Option “NoAccel” This option will disable the use of any accelerated functions.
Please read the section below about dual-head display. On a cold-booted system this might be the appropriate value to use at the text console see the ” TextClockFreq ” optionas many flat panels will need a dot clock different than the default to technolovies. Further to this some of the XAA acceleration requires that the display pitch is a multiple of 64 pixels.
Chips and Technologies Asiliant Vendor: This serial link allows an LCD screens to be located up to m from the video processor. No affiliation or endorsement is chils or implied.
Any other third-party products, brands or trademarks listed above are the sole property of their respective owner. The HiQV series of chips doesn’t need to use additional clock cycles to display higher depths, and so the same modeline can be used at all depths, without needing technolpgies divide the clocks.
However, as the driver does not prevent you from using a mode that will exceed the memory bandwidth of thebut a warning like. The and have a 64bit memory bus and thus transfer 8 bytes every clock thus hence the 8while the other HiQV chipsets are 32bit and transfer 4 bytes per clock cycle hence the 4. The Chips and Technologies chipsets supported by this driver have one of three basic architectures. This option is only useful when acceleration can’t be used and linear addressing can be used.
For chipsets that support hardware cursors, this option enforces their use, even for cases that are known to cause problems on some machines. It is possible to turn the linear addressing off with this option. Dual refresh rate display can be selected with the ” DualRefresh ” option described above. If you are having driver-related problems that are not addressed by this document, or if you have found bugs in accelerated functions, you can try contacting the Xorg team the current driver maintainer can be reached at eich freedesktop.
The memory bandwidth is determined by the clock used for the video memory. Try reducing the clock.
Here you can download free drivers for Chips and Technologies Asiliant It also reduces the effect of cursor flashing during graphics operations. It should be noted that the dual channel display options of the require the use of 6555 memory bandwidth, as each display channel independently accesses the video memory.
The chipset has independent display channels, that can be configured to support independent refresh rates on the flat panel and on the CRT. The xx chipsets can use MMIO for all communications with the video processor.
Note that this option only has an effect on TFT screens.